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lt5502 1 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. n ieee802.11 n high speed wireless lan n wireless local loop n single 1.8v to 5.25v supply n if frequency range: 70mhz to 400mhz n 84db limiting if gain n 90db linear rssi range n 7.7mhz lowpass output filter n baseband i/q amplitude imbalance: <0.7db n 4db noise figure n low supply current: 25ma n outputs biased up while in standby n shutdown current: 1 m a n 24-lead narrow ssop package applicatio s u features descriptio u typical applicatio u 400mhz quadrature if demodulator with rssi , ltc and lt are registered trademarks of linear technology corporation. the lt ? 5502 is a 70mhz to 400mhz monolithic integrated quadrature if demodulator. it consists of an if limiter, quadrature down mixers, integrated lowpass filters, and divide-by-two lo buffers. the demodulator provides all building blocks for demodulation of i and q baseband signals with a single supply voltage of 1.8v to 5.25v. the if limiter has 84db small-signal gain, and a built-in receive signal strength indicator (rssi) with over 90db linear range. the input referred noise-spectral-density is 1.45nv/? hz, which is equivalent to a 4db noise figure when the input is terminated with a 50 w source. the integrated lowpass output filters act as antialiasing and pulse-shaping filters for demodulated i/q-baseband sig- nals. the 3db cutoff frequency of the filters is about 7.7mhz. the vco frequency is required to be twice the desired operating frequency to provide quadrature local oscillator (lo) signals to the mixers. the standby mode provides fast transient response to the receive mode with reduced supply current when the i/q outputs are ac-coupled to a baseband chip. i/q output swing, rssi output vs if input power if input power (dbm) ?5 differential output swing (mv p-p ) 1200 1000 800 600 400 200 rssi output (v) 1.2 1.0 0.8 0.6 0.4 0.2 ?0 ?5 ?0 ?5 5502 ta01b ?0 5 2xlo + 2xlo if + if en v cc i out + i out q out + q out 90 0 gnd 2v c2 1f c1 1nf c4 1.8pf rssi enable 2xlo input if input r1 240 c3 22nf baseband differential i/q outputs 5502 ta01a 2 lt5502
lt5502 2 power supply voltage ............................................ 5.5v lo input power .................................................. 10dbm if input power .................................................... 10dbm operating ambient temperature (note 2) ..............................C40 c to 85 c storage temperature range ................. C 65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c voltage on any pin not to exceed ............................. v cc order part number t jmax = 150 c, q ja = 85 c/w lt5502egn absolute axi u rati gs w ww u package/order i for atio uu w (note 1) electrical characteristics v cc = 3v, f 2xlo = 570mhz, p 2xlo = C10dbm, f if = 280mhz, p if = C50dbm, t a = 25 c, unless otherwise noted. (note 3) consult factory for parts specified with wider operating temperature ranges. 1 2 3 4 5 6 7 8 9 10 11 12 top view gn package 24-lead narrow plastic ssop 24 23 22 21 20 19 18 17 16 15 14 13 q out + q out v cc gnd gnd 2xlo + 2xlo v cc v cc rssi gnd ift i out + i out gnd v cc gnd if + if gnd gnd en stby ift + symbol parameter conditions min typ max units if input f if frequency range 70 to 400 mhz 3db limiting sensitivity C79 dbm noise figure terminated 50 w source 4 db dc common mode voltage 2.6 v demodulator i/q output i/q output voltage swing differential 850 mv p-p i/q amplitude mismatch 0.1 0.7 db i/q phase mismatch 0.6 deg output driving capability differential; c max = 10pf 1.5 k w dc common mode voltage 1.84 v rssi linear dynamic range (note 4) 3db linearity error 90 db output impedance 3.8 k w output voltage input = C 70dbm 0.27 0.41 0.54 v output voltage input = 0dbm 0.8 1.01 1.2 v output voltage slope input from C70dbm to 0dbm 8.7 mv/db linearity error input from C70dbm to 0dbm 1 db baseband lowpass filter 3db cutoff frequency 7.7 mhz group delay ripple 16.4 ns
lt5502 3 typical perfor a ce characteristics uw power supply current vs temperature i/q output swing vs temperature i/q output swing vs if input power electrical characteristics v cc = 3v, f 2xlo = 570mhz, p 2xlo = C10dbm, f if = 280mhz, p if = C50dbm, t a = 25 c, unless otherwise noted. (note 3) (note 3) if input power (dbm) ?5 differential output swing (mv p-p ) 5 5502 g03 ?0 ?5 ?0 ?5 ?0 1200 1000 800 600 400 200 t a = 40 c t a = 25c t a = 85c v cc = 3v f if = 280mhz supply voltage (v) 1.8 supply current (ma) 5.5 5502 g01 2.5 3.5 4.5 36 32 28 24 20 16 t a = 40 c t a = 25c t a = 85c supply voltage (v) 1.8 differential output swing (mv p-p ) 800 1000 5.5 5502 g02 600 400 2.5 3.5 4.5 1200 t a = 40 c t a = 25c t a = 85c f if = 280mhz symbol parameter conditions min typ max units 2xlo f 2xlo frequency range 140 to 800 mhz p 2xlo input power C20 C5 dbm dc common mode voltage 2.6 v power supply v cc supply voltage 1.8 5.25 v i cc supply current en = high 25 32 ma i off shutdown current en = low; standby = low 1 100 m a standby mode current en = low; standby = high 2.6 3.5 ma note 1: absolute maximum ratings are those values beyond which the life a device may be impaired. note 2: specifications over the C40 c to 85 c temperature range are assured by design, characterization and correlation with statistical process controls. note 3: tests are performed as shown in the configuration of figure 3. note 4: tests are performed as shown in the configuration of figure 1 for if input.
lt5502 4 rssi output voltage vs v cc if input sensitivity vs temperature if input sensitivity vs if frequency typical perfor a ce characteristics uw lpf frequency response vs baseband frequency lpf group delay vs baseband frequency lpf frequency response vs v cc (note 3) if input power (dbm) ?5 rssi output (v) 5 5502 g07 ?0 ?5 ?0 ?5 ?0 1.2 1.0 0.8 0.6 0.4 0.2 f if = 280mhz t a = 25c v cc = 3v v cc = 5.5v v cc = 1.8v supply voltage (v) 1.8 input sensitivity (dbm) 5.5 5502 g08 2.5 3.5 4.5 ?3 ?5 ?7 ?9 ?1 ?3 t a = 40 c t a = 25c t a = 85c f if = 280mhz if frequency (mhz) 70 input sensitivity (dbm) ?9 ?6 5502 g09 ?2 ?5 150 200 250 300 350 400 100 ?3 t a = 40 c t a = 25c v cc = 3v t a = 85c baseband frequency (mhz) 0 gain response (db) 12 20 5502 g10 48 16 5 0 ? ?0 ?5 ?0 ?5 ?0 ?5 v cc = 3v t a = 85c t a = 40 c t a = 25c baseband frequency (mhz) 0 group delay (ns) 110 95 80 65 50 35 20 4 8 12 16 5502 g11 20 v cc = 3v t a = 85c t a = 40 c t a = 25c baseband frequency (mhz) 0 gain response (db) 12 20 5502 g12 48 16 5 0 ? ?0 ?5 ?0 ?5 ?0 ?5 110 90 70 50 30 v cc = 1.8v, 3v, 5.5v t a = 25c group delay (ns) i/q output swing vs if input power rssi output vs temperature rssi output voltage vs if frequency if input power (dbm) ?5 differential output swing (mv p-p ) 5 5502 g04 ?0 ?5 ?0 ?5 ?0 1200 1000 800 600 400 200 f if = 70mhz f if = 280mhz f if = 400mhz v cc = 3v t a = 25c if input power (dbm) ?5 rssi output (v) 5 5502 g05 ?0 ?5 ?0 ?5 ?0 1.2 1.0 0.8 0.6 0.4 0.2 t a = 40 c t a = 85c v cc = 3v f if = 280mhz t a = 25c if input power (dbm) ?5 rssi output (v) 5 5502 g06 ?0 ?5 ?0 ?5 ?0 1.2 1.0 0.8 0.6 0.4 0.2 f if = 70mhz f if = 280mhz v cc = 3v t a = 25c f if = 400mhz
lt5502 5 uu u pi fu ctio s i out + (pin 1): positive baseband output pin of i-channel. the dc bias voltage is v cc C 1.16v. this pin should not be shorted to ground. i out C (pin 2): negative baseband input pin of i-channel. the dc bias voltage is v cc C 1.16v. this pin should not be shorted to ground. gnd (pins 3, 5, 8, 9, 14, 20, 21): ground pin. v cc (pins 4, 16, 17, 22): power supply pin. this pin should be decoupled using 1000pf and 0.1 m f capacitors. if + (pin 6): positive if input pin. the dc bias voltage is v cc C 0.4v. if C (pin 7): negative if input pin. the dc bias voltage is v cc C 0.4v. en (pin 10): enable pin. when the input voltage is higher than 0.9v or up to v cc , the circuit is completely turned on. when the input voltage is less than 0.7v or down to ground, the circuit is turned off except the part of the circuit associated with standby mode. stby (pin 11): standby pin. when the input voltage is higher than 0.9v or up to v cc , the circuit of standby mode is turned on to bias the i/q buffers to desired quiescent voltage. when the input voltage is less than 0.7v or down to ground, it is turned off. ift + (pin 12): interstage if positive pin. the dc bias voltage is v cc C 0.25v. ift C (pin 13): interstage if negative pin. the dc bias voltage is v cc C 0.25v. rssi (pin 15): rssi output pin. 2xlo C (pin 18): negative carrier input pin. the input- signals frequency must be twice that of the desired demodulator lo frequency. the dc bias voltage is v cc C 0.4v. 2xlo + (pin 19): positive carrier input pin. the input- signals frequency must be twice that of the desired demodulator lo frequency. the dc bias voltage is v cc C 0.4v. q out C (pin 23): negative baseband output pin of the q-channel. the dc bias voltage is v cc C 1.16v. this pin should not be shorted to ground. q out + (pin 24): positive baseband output pin of the q-channel. the dc bias voltage is v cc C 1.16v. this pin should not be shorted to ground. block diagra w 2xlo + 2xlo if + if en bias 5502 bd limiter 2 limiter 1 1 6 12 13 7 2 24 23 10 15 rssi rssi lo buffers ift + ift i out + i out q out + q out q-mixer i-mixer lpf lpf 1 1 divide 2 0/90 19 18
lt5502 6 applicatio s i for atio wu u u the lt5502 consists of the following sections: if limiter, i/q demodulators, quadrature lo carrier generator, inte- grated lowpass filters (lpfs), and bias circuitry. an if signal is fed to the inputs of the if limiter. the limited if signal is then demodulated into i/q baseband signals using the quadrature lo carriers that are generated from the divide-by-two circuit. the demodulated i/q signals are passed through 5th order lpfs and buffered with an output driver. if limiter the if limiter has 84db small-signal gain with a frequency range of 70mhz to 400mhz. it consists of two cascaded stages of if amplifiers/limiters. the differential outputs of the first stage are connected internally to the differential inputs of the second stage. an interstage filtering is possible in between (pin 12 and pin 13) with minimum off- chip components. it can be a simple parallel lc tank circuit l1 and c8 as shown in figure 3. the 22nf blocking capacitor, c19, is used for the proper operation of the internal dc offset canceling circuit. to achieve the best receiver sensitivity, a differential configuration at the if input is recommended due to its better immunity to 2xlo signal coupling to the if limiter. otherwise, the 2xlo interference, presented at the if inputs, may saturate the if limiter and reduce the gain of the wanted if signal. the receivers 3db input-limiting sensitivity will be affected correspondingly. the interstage bandpass filter will mini- mize both 2xlo feedthrough and the receivers noise bandwidth. therefore, the receivers input sensitivity can be improved. without the interstage filter, the second stage will be limited by the broadband noise amplified by the first stage. the noise bandwidth in this case can be as high as 500mhz. the 3db input limiting sensitivity is about C79dbm at an if frequency of 280mhz when terminated with 200 w at the input. the differential if input impedance is 2.2k w . therefore, a 240 w resistor is used for r3 as shown in figure 3. using a bandpass filter with 50mhz bandwidth, the input sensitivity is improved to C86dbm. the 1:4 if input transformer can also be replaced with a narrow band single-to-differential conversion circuit using three discreet elements as shown in figure 1. their nominal values are listed in table 1. due to the parasitics of the pcb, their values need to be compensated. the receivers input sensitivity in this case is improved to C85dbm even without interstage filtering. the matching circuit is essentially a second order bandpass filter. there- fore, the requirement for the front-end channel-select filter can be eased too. figure 1. if input matching network at 280mhz table 1. the component values of matching network l sh , c s1 and c s2 f if (mhz) l sh (nh) c s1 /c s2 (pf) 70 642 13.7 100 422 9.6 150 256 6.4 200 176 4.8 250 130 3.8 300 101 3.2 350 80.4 2.7 400 66.0 2.4 in an application where a lower input sensitivity is satisfac- tory, one of the if inputs can be simply ac-terminated with a 50 w resistor and the other ac-grounded. the input receivers sensitivity is about C 76dbm at 280mhz in this case. c s1 3.3pf c5 22nf c s2 3.3pf l sh 120nh if input to if + to if 5502 f01 matching network
lt5502 7 the receive signal strength indicator (rssi) is built into the if limiter. the input if signal is detected in a current output proportional to the if input power. the current outputs from two cascaded stages of if amplifiers/limiters are summed and converted into the rssi voltage. the rssi output has an excellent linear range of 90db. the characteristic of rssi output voltage versus input if power is independent of temperature and process varia- tion. the nominal output impedance is 3.8k w . an off-chip capacitor c7 is needed to reduce the rssi voltage ripple. its value can be determined using the following formula: c f f if 7 1 760 3 p i/q demodulators the quadrature demodulators are double balanced mix- ers, down converting the limited if signals from the if limiter into i/q baseband signals. the quadrature lo carriers are obtained from the internal quadrature lo carrier generator. the nominal output voltage of differen- tial i/q baseband signals is about 850mv p-p . these mag- nitudes are well matched, and their phases are 90 apart. quadrature lo carrier generator the quadrature lo carrier generator consists of a divide- by-two circuit and lo buffers. an input signal (2xlo) with twice the desired lo carrier frequency is used as the clock for the divide-by-two circuit, producing the quadrature lo carriers for the demodulators. the outputs are buffered and then drive the down converting mixers. with a full differential approach, the quadrature lo carriers are well matched. integrated low pass filters the 5th order integrated lowpass filters are used for filtering the down converted baseband outputs for both the i-channel and the q-channel. they serve as anti- aliasing and pulse-shaping filters. the i/q filters are well matched in gain response and group delay. the 3db corner frequency is 7.7mhz and the group delay ripple is 16.4ns. the i/q differential outputs have output driving capability of 1.5k w with maximum capacitive loading of 10pf. the outputs are internally biased at v cc C1.16v. figure 2 shows the simplified output circuit schematic of i-channel or q-channnel. applicatio s i for atio wu u u the i/q baseband outputs can be directly dc-coupled to the inputs of a baseband chip. for ac-coupled applica- tions with large coupling capacitors, the stby pin can be used to prebias the outputs to the desired quiescent voltage at much reduced current. this mode only draws 2.6ma. when the en pin is then turned on, the chip is quickly switched to normal operating mode without long time constants due to charging or discharging the large coupling capacitors. table 2 shows the logic of the en pin and stby pin. in both normal operating mode and standby mode, the maximum discharging current is about 200 m a, and the maximum charging current is more than 10ma. table 2. the logic of different operating modes en stby comments low low shutdown mode low high standby mode high low or high normal operation mode 5502 f02 200 a 200a v cc i out + (or q out + ) i out (or q out ) i-channel (or q-channel): differential signals from lpf + + figure 2. simplified circuit schematic of i-channel (or q-channel) outputs
lt5502 8 typical applicatio s u figure 3. evaluation circuit schematic with i/q output buffers + 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 q out + q out v cc gnd gnd 2xlo + 2xlo v cc v cc rssi gnd ift i out + i out gnd v cc gnd if + if gnd gnd en stby ift + ? 2 u1 lt5502 t1 jtx-4-10t 1:4 mini-circuit 4:1 mini-circuit if in r10 5.11k r7 49.9 r3 240 r2 20k r1 20k r9 51.1k c12 1.8pf r13 5.11k c16 1.8pf c5 22nf r4 240 c10 1f c1 1f c9 1f c24 10f c20 1f c25 10f c2 1nf sw1 1 = en 2 = stby 1 6 1 6 + 7 7 6 6 4 4 3 2 3 2 j2 i out i out + i out q out + q out q out j1 t2 jtx-4-10t j4 c23 1f c19 22nf c11 1f c4 1nf c3 1nf c18 1f c7 1.8pf c13 1f r16 49.9 j3 c17 1f u2 lt1809cs u3 lt1809cs l1 c8 r17 if interstage optional circuit rssi v cc2 v cc1 v cc2 r6 2.55k c15 1f r12 2.55k r8 51.1k r14 51.1k c14 1f r15 51.1k 2xlo 5502 f02
lt5502 9 typical applicatio s u figure 5. component side layout of evaluation board figure 4.component side silkscreen of evaluation board
lt5502 10 typical applicatio s u figure 7. bottom side layout of evaluation board figure 6.bottom side silkscreen of evaluation board
lt5502 11 package descriptio u dimensions in inches (millimeters) unless otherwise noted. 0.337 ?0.344* (8.560 ?8.738) gn24 (ssop) 1098 * dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side ** dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side 12 3 4 5 6 7 8 9 10 11 12 0.229 ?0.244 (5.817 ?6.198) 0.150 ?0.157** (3.810 ?3.988) 16171819 2021222324 15 14 13 0.016 ?0.050 (0.406 ?1.270) 0.015 0.004 (0.38 0.10) 45 0 ?8 typ 0.007 ?0.0098 (0.178 ?0.249) 0.053 ?0.068 (1.351 ?1.727) 0.008 ?0.012 (0.203 ?0.305) 0.004 ?0.0098 (0.102 ?0.249) 0.0250 (0.635) bsc 0.033 (0.838) ref gn package 24-lead plastic ssop (narrow 0.150) (ltc dwg # 05-08-1641)
lt5502 12 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear-tech.com ? linear technology corporation 2001 5502f lt/tp 0101 2k ? printed in usa typical applicatio u example: 2.4ghz to 2.5ghz receiver application (rx if = 280mhz) 5502 ta02 lo buffer f/2 i mixer q mixer i outputs q outputs 1 2 24 23 11 10 a/d a/d baseband processor buffer buffer lpf lpf 0 90 limiter 1 limiter 2 stby en lt5502 30nh 30nh 200 2.7pf 100pf 2.7pf if synthesizer 3,5,8,9, 14,20,21 18 19 1.8pf 15 120nh 22nf 3.3pf 4,16,17,22 v cc 0.1f 2v 12 13 6 7 280mhz if saw bp filter rx front end rx input: 2.4ghz to 2.5ghz main synthesizer 3.3pf rssi 2nd lo, 560mhz 1st lo, 2.12ghz to 2.22ghz 1nf 1nf

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